Referring to the accompanying drawing, a description is provided hereinafter of a conventional Σ−Δ type A/D converter of this kind capable of handling a plurality of input signals.
FIG. 7 is a circuit diagram of the conventional Σ−Δ type A/D converter. In FIG. 7, input unit 1 comprises capacitor 2 connected to a first input, capacitor 3 connected to a second input and input switching devices 4 for switching these capacitors 2 and 3. Digital-to-analog (“D/A”) converter unit 5 includes reference voltages 6 and 7 and D/A switching device 8 for switching a level of electric charge being output by selectively switching these reference voltages 6 and 7. Integrator unit 9 comprises operational amplifier 10 for receiving electric charges output from input unit 1 and D/A converter unit 5, capacitors 11 and 12 for storing the electric charges input thereto and integrator switching devices 13 for switching these capacitors 11 and 12.
Comparator unit 14 comprises comparator 15 for comparing a voltage output from integrator unit 9 with a predetermined voltage, and delay flip-flop 16 for holding a comparison signal output from comparator unit 15. An output of this delay flip-flop 16 is input to D/A switching device 8 for switching an output level of D/A converter unit 5.
The conventional Σ−Δ type A/D converter constructed as above operates in a manner, which is described hereinafter.
When the first input is selected, input unit 1 and integrator unit 9 charge and discharge capacitor 2 with electric charge of an amount proportional to the first input. The charged and discharged electric charge is then forwarded to capacitor 11. When the second input is selected, input unit 1 and integrator unit 9 charge and discharge capacitor 3 with electric charge of an amount proportional to the second input, and the charged and discharged electric charge is forwarded to capacitor 12 in the same manner.
As described, the conventional Σ−Δ type A/D converter operates in a manner to switch integration capacitors 11 and 12 according to the selection of the input signal. This Σ−Δ type A/D converter can hence shorten a delay in time of switching the input and reduce a size of the circuit as compared with other methods requiring A/D converters of the same number as that of input signals. Patent reference 1, for instance, is one of the prior art documents known to be relevant to the invention of this patent application.
In the conventional configuration discussed above, however, the reference voltage input to operational amplifier 10 in integrator unit 9 and reference voltages 6 and 7 in D/A converter unit 5 fluctuate as they are influenced by changes in the voltage of power supply as well as the temperature. Since they exert influences directly on signals output from the conventional Σ−Δ type A/D converter, they deteriorate accuracy of the outputs of the A/D converter.
[Patent Reference 1] Japanese Patent Unexamined Publication, No. 2001-237706.